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 Data Sheet No. PD60146 Rev N
IR2117(S)/IR2118(S) & (PbF)
SINGLE CHANNEL DRIVER
Features
* * * * * *
Floating channel designed for bootstrap operation Fully operational to +600V Tolerant to negative transient voltage dV/dt immune Gate drive supply range from 10 to 20V Undervoltage lockout CMOS Schmitt-triggered inputs with pull-down Output in phase with input (IR2117) or out of phase with input (IR2118) Also available LEAD-FREE
Product Summary
VOFFSET IO+/VOUT ton/off (typ.) 600V max. 200 mA / 420 mA 10 - 20V 125 & 105 ns
Description
The IR2117/IR2118(S) is a high voltage, high speed power MOSFET and IGBT driver. Proprietary HVIC and latch immune CMOS technologies enable ruggedized monolithic construction. The logic input is compatible with standard CMOS outputs. The output driver features a high pulse current buffer stage designed for minimum cross-conduction. The floating channel can be used to drive an N-channel power MOSFET or IGBT in the high or low side configuration which operates up to 600 volts.
Packages
8-Lead PDIP IR2117/IR2118
8-Lead SOIC IR2117S/IR2118S
Typical Connection
up to 600V
VCC IN
VCC IN COM
VB HO VS
TO LOAD
IR2117
up to 600V
VCC IN
VCC IN COM
VB HO VS
TO LOAD
(Refer to Lead Assignments for correct pin configuration). This/These diagram(s) show electrical connections only. Please refer to our Application Notes and DesignTips for proper circuit board layout.
IR2118
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1
IR2117(S)/IR2118(S) & (PbF)
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. Additional information is shown in Figures 5 through 8.
Symbol
VB VS VHO VCC VIN dVs/dt PD RthJA TJ TS TL
Definition
High side floating supply voltage High side floating supply offset voltage High side floating output voltage Logic supply voltage Logic input voltage Allowable offset supply voltage transient (figure 2) Package power dissipation @ TA +25C Thermal resistance, junction to ambient Junction temperature Storage temperature Lead temperature (soldering, 10 seconds) (8 lead PDIP) (8 lead SOIC) (8 lead PDIP) (8 lead SOIC)
Min.
-0.3 VB - 25 VS - 0.3 -0.3 -0.3 -- -- -- -- -- -- -55 --
Max.
625 VB + 0.3 VB + 0.3 25 VCC + 0.3 50 1.0 0.625 125 200 150 150 300
Units
V
V/ns W C/W
C
Recommended Operating Conditions
The input/output logic timing diagram is shown in figure 1. For proper operation the device should be used within the recommended conditions. The VS offset rating is tested with all supplies biased at 15V differential.
Symbol
VB VS VHO VCC VIN TA
Definition
High side floating supply absolute voltage High side floating supply offset voltage High side floating output voltage Logic supply voltage Logic input voltage Ambient temperature
Min.
VS + 10 Note 1 VS 10 0 -40
Max.
VS + 20 600 VB 20 VCC 125
Units
V
C
Note 1: Logic operational for VS of -5 to +600V. Logic state held for VS of -5V to -VBS. (Please refer to the Design Tip DT97-3 for more details).
2
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IR2117(S)/IR2118(S) & (PbF)
Dynamic Electrical Characteristics
VBIAS (VCC, VBS) = 15V, CL = 1000 pF and TA = 25C unless otherwise specified. The dynamic electrical characteristics are measured using the test circuit shown in Figure 3.
Symbol
ton toff tr tf
Definition
Turn-on propagation delay Turn-off propagation delay Turn-on rise time Turn-off fall time
Min. Typ. Max. Units Test Conditions
-- -- -- -- 125 105 80 40 200 180 130 65 ns VS = 0V VS = 600V
Static Electrical Characteristics
VBIAS (VCC, VBS) = 15V and TA = 25C unless otherwise specified. The VIN, VTH and IIN parameters are referenced to COM. The VO and IO parameters are referenced to COM and are applicable to the respective output leads: HO or LO.
Symbol
VIH VIL VOH VOL ILK IQBS IQCC IIN+ IINVBSUV+ VBSUVVCCUV+ VCCUVIO+
Definition
input voltage - logic "1" (IR2117) logic "0" (IR2118) Input voltage - logic "0" (IR2117) logic "1" (IR2118) High level output voltage, VBIAS - VO Low level output voltage, VO Offset supply leakage current Quiescent VBS supply current Quiescent VCC Supply Current Logic "1" input bias current Logic "0" input bias current (IR2117) (IR2118) (IR2117) (IR2118) VBS supply undervoltage positive going threshold VBS supply undervoltage negative going threshold VCC supply undervoltage positive going threshold VCC supply undervoltage negative going threshold Output high short circuit pulsed current
Min. Typ. Max. Units Test Conditions
9.5 -- -- -- -- -- -- -- -- 7.6 7.2 7.6 7.2 200 -- -- -- -- -- 50 70 20 -- 8.6 8.2 8.6 8.2 250 -- 6.0 100 100 50 240 340 40 1.0 9.6 9.2 9.6 9.2 -- VO = 0V VIN = Logic "1" PW 10 s VO = 15V VIN = Logic "0" PW 10 s V A V mV IO = 0A IO = 0A VB = VS = 600V VIN = 0V or VCC VIN = 0V or VCC VIN = VCC VIN = 0V VIN = 0V VIN = VCC
IO-
Output low short circuit pulsed current
420
500
--
mA
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3
IR2117(S)/IR2118(S) & (PbF)
Functional Block Diagram (IR2117)
VCC UV DETECT
HV LEVEL SHIFT
VB R R S Q HO
PULSE FILTER
IN PULSE GEN UV DETECT VS
COM
Functional Block Diagram (IR2118)
VCC UV DETECT
HV LEVEL SHIFT
VB R Q R S VS HO
PULSE FILTER
IN
PULSE GEN
UV DETECT
COM
4
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IR2117(S)/IR2118(S) & (PbF)
Lead Definitions
Symbol
VCC IN IN COM VB HO VS
Description
Logic and gate drive supply Logic input for gate driver output (HO), in phase with HO (IR2117) Logic input for gate driver output (HO), out of phase with HO (IR2118) Logic ground High side floating supply High side gate drive output High side floating supply return
Lead Assignments
1 2 3 4
VCC IN COM
VB HO VS
8
7 6 5
1 2 3 4
VCC IN COM
VB HO VS
8
7 6 5
8 Lead PDIP
8 Lead SOIC
IR2117
IR2117S
1 2 3 4
VCC IN COM
VB HO VS
8
7 6 5
1 2 3 4
VCC IN COM
VB HO VS
8
7 6 5
8 Lead PDIP
8 Lead SOIC
IR2118
IR2118S
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5
IR2117(S)/IR2118(S) & (PbF)
IN
(IR2118)
IN
(IR2117)
<50 V/ns
IR2117/IR2118
HO
Figure 1. Input/Output Timing Diagram
Figure 2. Floating Supply Voltage Transient Test Circuit
IN
(IR2118)
50% 50%
50%
50%
IN
(IR2117)
ton
tr
90%
toff
90%
tf
IR2117/IR2118
HO
10%
10%
Figure 3. Switching Time Test Circuit
Figure 4. Switching Time Waveform Definition
6
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IR2117(S)/IR2118(S) & (PbF)
500
500 Turn-on Delay Time (ns) 400 300
M ax.
Turn-on Delay Time (ns)
400 300 200 100
Typ.
M ax.
200
Typ.
100 0
0 -50
-25
0
25
50
o
75
100
125
10
12
14
16
18
20
Temperature ( C) Figure 4A. Turn-On Tim e vs. Tem perature
V BIAS Supply Voltage (V) Figure 4B. Turn-On Time vs. Supply Voltage
500 Turn-Off Time (ns) 400 300 200
M ax.
500 Turn-Off Time (ns) 400 300
M ax.
200
Typ.
100
Typ.
100 0
0 -50
-25
0
25
50
75
100
125
10
12
14
16
18
20
Temperature (oC) Figure 5A. Turn-Off Tim e vs. Tem perature
V BIAS Supply Voltage (V) Figure 5B. Turn-Off Time vs. Supply Voltage
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IR2117(S)/IR2118(S) & (PbF)
500 Turn-On Rise Time (ns) 400 300 200 100
M ax.
500 Turn-On Rise Time (ns) 400 300 200 100
Typ. M ax.
Typ.
0 -50
0
-25
0
25
50
o
75
100
125
10
12
14
16
18
20
Temperature ( C) Fiure 6A. Turn-On Rise Time vs.Temperature
V BIAS Supply Voltage (V) Figure 6B. Turn-On Rise Time vs. Supply Voltage
250 Turn-Off Fall Time (ns) 200 150 100
M ax.
250 Turn-Off Fall Time (ns) 200 150 100 50
Typ. M ax.
50 0 -50
Typ.
0 -25 0 25 50
o
75
100
125
10
12
14
16
18
20
Temperature ( C)
Figure 7A. Turn-Off Fall Tim e vs. Tem perature
V BIAS Supply Voltage (V) Figure 7B. Turn-Off Fall Tim e vs. Supply Voltage
8
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IR2117(S)/IR2118(S) & (PbF)
13
13 Input Voltage (V) 12 11 10 9 8
-25 0 25 50 75 100 125
Mi n.
Input Voltage (V)
12 11 10 9
Mi n.
8 -50
10
12
14
16
18
20
Temperature ( oC) Figure 8A. Logic "1" (IR2118 "0") Input Voltage vs. Tem perature
V cc Supply Voltage (V) Figure 8B. Logic "1" (IR2118 "0") Input Voltage vs. Supply Voltage
9 Input Voltage (V) 8 7
M ax.
9 8 7
M ax.
6 5 4 -50
Input Voltage (V) 0 25 50
o
6 5 4
-25
75
100
125
10
12
14
16
18
20
Temperatre ( C) Figure 9A. Logic "0" (IR2118 "1") Input Voltage vs. Tem perature
V cc Supply Voltage (V) Figure 9B. Logic "0" (IR2118 "1") Input Voltage vs. Supply Voltage
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9
IR2117(S)/IR2118(S) & (PbF)
High Level Output Voltage (V)
0.4 0.3 0.2
M ax.
High Level Output Voltage (V)
0.5
0.5 0.4 0.3 0.2
M ax.
0.1 0.0 -50
0.1 0 10 12 14 16 18 20 V cc Supply Voltage (V) Figure 10B. High Level Output vs. Supply Voltage
-25
0
25
50
o
75
100
125
Temperature ( C) Figure 10A. High Level Output vs. Temperature
Low Level Output Voltage (V)
Low Level Output Voltage (V)
0.5 0.4 0.3 0.2
M ax.
0.5 0.4 0.3 0.2 0.1 0 10 12 14 16 18 20
MAX.
0.1 0 -50
-25
0
25
50
75
100
125
Temperature (oC) Figure 11A. Low Level Output vs.Temperature
V cc Supply Voltage (V) Figure 11B. Low Level Output vs. Supply Voltage
10
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IR2117(S)/IR2118(S) & (PbF)
Offset Supply Leakage Current ( A)
500 400 300 200 100
M ax.
Offset Supply Leakage Current ( A)
500 400 300 200 100 0 0 100 200 300 400 500 600 VB Boost Voltage (V)
Figure 12B. Offset Supply Leakage Current vs. V B Boost Voltage
M ax.
0 -50
-25
0
25
50
o
75
100
125
Temperature ( C) Figure 12A. Offset Supply Leakage Current vs. Temperature
1000 ) V Supply Current ( 800 600 400
M ax.
1000 ) V Supply Current ( 800 600 400 200 0 -25 0 25 50
o M ax.
200
Typ.
Typ.
0 -50
75
100
125
10
12
14
16
18
20
Temperature ( C) Figure 13A. V BS Supply Current vs. Tem perature
V BS Supply Voltage (V) Figure 13B. V BS Supply Current vs. Supply Voltage
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IR2117(S)/IR2118(S) & (PbF)
1000 V cc Supply Current ( A) V cc Supply Current ( 800 600 400 200
Typ. M ax.
1000 ) 800 600 400
M ax.
200
Typ.
0 -50
0 -25 0 25 50
o
75
100
125
10
12
14
16
18
20
Temperature ( C) Figure 14A. V cc Supply Current vs. Tem perature
V cc Supply Voltage (V)
Figure 14B. V cc Supply Current vs . Supply Voltage
120 )
120 ) Logic "1" Input Current ( 100 80 60
M ax.
Logic "1" Input Current (
100 80 60 40 20 0 -50
M ax.
40
Typ.
Typ.
20 0
-25
0
25
50
o
75
100
125
10
12
14
16
18
20
Temperature ( C) Figure 15A. Logic "1" (2118 "0") Input Current vs. Temperature
V cc Supply Voltage (V) Figure 15B. Logic "1" (2118 "0") Input Current vs. Supply Voltage
12
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IR2117(S)/IR2118(S) & (PbF)
5 4 3 2
M ax.
5 Logic "0" Input Current ( -25 0 25 50
o
)
Logic "0" Input Current (
) 4 3 2
M ax.
1 0 -50
1 0 10 12 14 16 18 20 V cc Supply Voltage (V) Figure 16B. Logic "0" (2118"1") Input Current vs. Supply Voltage
75
100
125
Temperature ( C) Figure 16A. Logic "0" (2118"1") Input Current vs. Temperature
16 ) V cc Supply Current (
V cc Supply Current (
16 ) 14 12 10 8 6 -50
M ax
14 12 10 8
Mi n.
M ax.
Typ.
Typ.
Mi n.
6 -50
-25
0
25
50
75
100
125
-25
0
25
50 (oC)
75
100
125
Temperature (oC)
Figure 17A. V cc Undervoltage Threshold (+) vs. Temperature
Temperature
Figure 18A. V cc Undervoltage Threshold (-) vs. Tem perature
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IR2117(S)/IR2118(S) & (PbF)
16 ) V BS Supply Current ( V Supply Current ( 14 12 10 8
Mi n. M ax. Typ.
16 ) 14 12 10 8
Mi n. M ax.
Typ.
6 -50
-25
0
25
50
o
75
100
125
6 -50
-25
0
25
50
o
75
100
125
Temperature ( C) Figure 19A. V BS Undervoltage Threshold (+) vs. Tem perature
Temperature ( C) Figure 20A. V BS Undervoltage Threshold (-) vs. Tem perature
)
Output Source Current (
400 300 200 100 0 -50
Typ.
Output Source Current (
)
Mi n.
500
500 400 300 200 100
Mi n.
Typ.
0 -25 0 25 50
o
75
100
125
10
12
14
16
18
20
Temperature ( C) Figure 21A. Output Source Current vs. Tem perature
V BIAS Supply Voltage (V)
Figure 21B. Output Source Curre nt vs . Supply Voltage
14
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IR2117(S)/IR2118(S) & (PbF)
1000 Output Sink Current ( ) Output Sink Current ( ) 800 600 400 200 0 -50
Typ.
1000 800 600 400 200 0 -25 0 25 50 75 100 125 10 12 14 16 18 20 Temperature (oC) Figure 22A. Output Sink Current vs.Temperature V BIAS Supply Voltage (V) Figure 22B. Output Sink Current vs. Supply Voltage
Typ.
Mi n.
Mi n.
vs Offset Supply Voltage (V)
0 -2
Typ.
-4 -6 -8 -10 -12 10 12 14 16 18 20 V BS Floting Supply Voltage (V) Figure 23B. Maximum VS Negative Offset vs. Supply Voltage
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15
IR2117(S)/IR2118(S) & (PbF)
150
320V 140V
150
320V
140V
125 Junction Temperature (C) Junction Temperature (C)
125
100
100
10V
75
10V
75
50
50
25
25
0 1E+2 1E+3 1E+4 Frequency (Hz) 1E+5 1E+6
0 1E+2 1E+3 1E+4 Frequency (Hz) 1E+5 1E+6
Figure 24. IR2117/IR2118 TJ vs. Frequency (IRFBC20) RGATE = 33, VCC = 15V
Figure 25. IR2117/IR2118 TJ vs. Frequency (IRFBC30) RGATE = 22, VCC = 15V
150
320V 140V
10V
150
320V 140V 10V
125 Junction Temperature (C) Junction Temperature (C) 1E+3 1E+4 Frequency (Hz) 1E+5 1E+6
125
100
100
75
75
50
50
25
25
0 1E+2
0 1E+2 1E+3 1E+4 Frequency (Hz) 1E+5 1E+6
Figure 26. IR2117/IR2118 TJ vs. Frequency (IRFBC40) RGATE = 15, VCC = 15V
Figure 27. IR2117/IR2118 TJ vs. Frequency (IRFPE50) RGATE = 10, VCC = 15V
16
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IR2117(S)/IR2118(S) & (PbF)
Case outlines
8-Lead PDIP
D A 5 B
FOOTPRINT 8X 0.72 [.028]
01-6014 01-3003 01 (MS-001AB)
DIM A b c D INC HES MIN .0532 .013 .0075 .189 .1497 MAX .0688 .0098 .020 .0098 .1968 .1574 MILLIMETERS MIN 1.35 0.10 0.33 0.19 4.80 3.80 MAX 1.75 0.25 0.51 0.25 5.00 4.00
A1 .0040
6 E
8
7
6
5 H 0.25 [.010] A
E
6.46 [.255]
1
2
3
4
e e1 H K L
8X 1.78 [.070]
.050 BASIC .025 BASIC .2284 .0099 .016 0 .2440 .0196 .050 8
1.27 BASIC 0.635 BASIC 5.80 0.25 0.40 0 6.20 0.50 1.27 8
6X
e e1
3X 1.27 [.050]
y
A C 0.10 [.004] y
K x 45
8X b 0.25 [.010]
NOTES:
A1 CAB
8X L 7
8X c
1. DIMENSIONING & TOLERANCING PER ASME Y14.5M-1994. 2. CONTROLLING DIMENSION: MILLIMETER 3. DIMENSIONS ARE SHOWN IN MILLIMETERS [INCHES]. 4. OUTLINE C ONFORMS TO JEDEC OUTLINE MS-012AA.
5 DIMENSION DOES NOT INC LUDE MOLD PROTRUSIONS. MOLD PROTRUSIONS NOT TO EXCEED 0.15 [.006]. 6 DIMENSION DOES NOT INC LUDE MOLD PROTRUSIONS. MOLD PROTRUSIONS NOT TO EXCEED 0.25 [.010]. 7 DIMENSION IS THE LENG TH OF LEAD FOR SOLDERING TO A SUBSTRATE.
01-6027
8-Lead SOIC
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IR2117(S)/IR2118(S) & (PbF)
LEADFREE PART MARKING INFORMATION
Part number
IRxxxxxx YWW? ?XXXX
Lot Code (Prod mode - 4 digit SPN code) IR logo
Date code
Pin 1 Identifier ? P MARKING CODE Lead Free Released Non-Lead Free Released
Assembly site code Per SCOP 200-002
ORDER INFORMATION
Basic Part (Non-Lead Free) 8-Lead PDIP IR2117 order IR2117 8-Lead PDIP IR2118 order IR2118 8-Lead SOIC IR2117S order IR2117S 8-Lead SOIC IR2118S order IR2118S Leadfree Part 8-Lead PDIP IR2117 order IR2117PbF 8-Lead PDIP IR2118 order IR2118PbF 8-Lead SOIC IR2117S order IR2117SPbF 8-Lead SOIC IR2118S order IR2118SPbF
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105 This product has been qualified per industrial level Data and specifications subject to change without notice. 4/2/2004
18
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